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review of last lecture openmp as simple parallel extension to c during parallel fork be aware of which variables should be shared vs private among threads work sharing accomplished with ...

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               Review of Last Lecture
     • OpenMP as simple parallel extension to C
        –During parallel fork, be aware of which variables 
          should be shared vs. private among threads
        –Work-sharing accomplished with 
          for/sections
        –Synchronization accomplished with 
          critical/atomic/reduction
     • Hardware is made up of transistors and wires
        –Transistors are voltage-controlled switches
        –Building blocks of all higher-level blocks
     7/18/2012              Summer 2012 -- Lecture #18         2
                 Great Idea #1: Levels of 
            Representation/Interpretation
          Higher-Level Language    temp = v[k];
            Program (e.g.  C)      v[k] = v[k+1];
                                   v[k+1] = temp;
                   Compiler
                                        lw   $t0, 0($2)
           Assembly Language            lw   $t1, 4($2)
          Program (e.g.  MIPS)          sw   $t1, 0($2)
                                        sw   $t0, 4($2)
                   Assembler
                                   0000 1001 1100 0110 1010 1111 0101 1000
           Machine Language        1010 1111 0101 1000 0000 1001 1100 0110 
            Program (MIPS)         1100 0110 1010 1111 0101 1000 0000 1001 
                                   0101 1000 0000 1001 1100 0110 1010 1111 
           Machine 
       Interpretation
     Hardware Architecture Description                 We are here
          (e.g.  block diagrams) 
        Architecture 
      Implementation
         Logic Circuit Description
        (Circuit Schematic Diagrams)
     7/18/2012              Summer 2012 -- Lecture #18         3
           Synchronous Digital Systems
        Hardware of a processor, such as the MIPS, is an example of 
                       a Synchronous Digital System
       Synchronous:
           •  All operations coordinated by a central clock
              ‒ “Heartbeat” of the system!
       Digital:
           •   Represent all values with two discrete values
           •   Electrical signals are treated as 1’s and 0’s
              ‒ 1 and 0 are complements of each other
           •   High/Low voltage for True/False, 1/0
     7/18/2012                Summer 2012 -- Lecture #18             4
          Signals and Waveforms: Clocks
                          Clock period (CPU cycle time)
                           Rising Edge                 Falling Edge
       • Signals transmitted over wires continuously
       • Transmission is effectively instantaneous
           – Implies that any wire only contains one value at 
             any given time
     7/18/2012                 Summer 2012 -- Lecture #18              5
                 Signals and Waveforms
     Stack 
    signals 
    on top 
    of each 
     other                                                  All signals 
                                                            change after 
                                                            clock “triggers”
     7/18/2012                  Summer 2012 -- Lecture #18               6
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...Review of last lecture openmp as simple parallel extension to c during fork be aware which variables should shared vs private among threads work sharing accomplished with for sections synchronization critical atomic reduction hardware is made up transistors and wires are voltage controlled switches building blocks all higher level summer great idea levels representation interpretation language temp v program e g compiler lw t assembly mips sw assembler machine architecture description we here block diagrams implementation logic circuit schematic synchronous digital systems a processor such the an example system operations coordinated by central clock heartbeat represent values two discrete electrical signals treated s complements each other high low true false waveforms clocks period cpu cycle time rising edge falling transmitted over continuously transmission effectively instantaneous implies that any wire only contains one value at given stack on top change after triggers...

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