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DVT IDE
for Visual Studio Code
For SystemVerilog, Verilog, Verilog-AMS, and VHDL
The complete development environment for hardware design and verification
10 REASONS TO CHOOSE BENEFITS
DVT IDE for Visual Studio Code
See the errors flagged by incremental compilation as you Increases productivity and reduces time to market
type
Write code faster using autocomplete and error fix Speeds up source code development
suggestions
Quickly move around in the source code using hyperlinks Enables efficient reading and understanding of
Query the project database to accurately locate relevant complex source code
information Simplifies debugging and legacy source code
Easily create and reuse code templates maintenance
Continuously improve your source code using
refactoring operations Ensures higher quality source code development
Easily understand the project structure using high-level
views Streamlines code review
Visualize the project architecture using UML and HDL
diagrams Accelerates language and methodology learning
Trace signals throughout the design
Work smoothly with mixed language projects
OVERVIEW
Design and Verification Tools (DVT) IDE for Visual Studio IEEE Standard Compliant Parser
Code (VS Code) is an integrated development The parser is compliant with the IEEE 1800™
environment (IDE) for SystemVerilog, Verilog, Verilog-AMS, SystemVerilog and IEEE 1076™ VHDL standards. Besides
and VHDL. It is similar to well-known programming tools fully supporting the design and verification languages,
such as Eclipse®, NetBeans®, and IntelliJ®. DVT IDE also flags the use of non-standard compliant
language constructs, which ultimately increases simulator
DVT IDE consists of a parser, a smart code editor, an compatibility.
intuitive graphical user interface, and a comprehensive set Integration with Other Tools
of features that help with code writing, inspection, DVT IDE works with revision control systems such as Git,
navigation, and debugging. It provides capabilities that are Subversion, and ClearCase, and bug tracking systems
specific to the hardware design and verification domain, such as Jira™.
such as design diagrams, signal tracing, and verification
methodology support. Visual Studio Code Ready
DVT IDE is a powerful tool that allows your engineers to DVT IDE is built on the powerful Visual Studio Code
overcome the limitations of plain text code editors and platform used by millions of engineers worldwide and
address today’s project complexity more efficiently. It inherits the best features and practices collected into the
enables faster and smarter code development and platform core. The VS Code platform’s extensible
simplifies legacy code maintenance for novices and architecture allows DVT IDE to integrate within a large
experts alike. extension ecosystem and work flawlessly with third-party
extensions.
DVT IDE for Visual Studio Code in action (1)
EFFICIENT CODE WRITING AND
SIMPLIFIED MAINTENANCE
Advanced Code Editing Features Autocomplete provides a context-sensitive list of
DVT IDE incorporates advanced code editing features proposals for partially entered text. This capability helps
such as: avoid typos and eliminates the need to search for
definitions in other files. Autoinstance allows engineers to
On-the-fly syntactic and semantic checking quickly instantiate and connect a module or entity when
Error fix suggestions needed.
Autocomplete and autoinstance Refactoring allows users to perform semantic changes in
Source code refactoring operations code. While a plain text editor or grep/sed utility is limited
to simple search and replace actions, DVT IDE can
Customizable code templates accurately perform powerful operations like “rename
Macro expansion method foo() of class bar” and “rename signal x of
module y.” All the definitions and places where the
Dedicated wizards to generate getters and setters method or signal is used are precisely updated. Users can
or override functions also “extract this piece of code into a separate function”
Highly configurable source code formatting and “add a new port p to module m.” Refactoring helps
engineers avoid tedious and error-prone operations such
Integration with revision control systems as scrolling through long lists of irrelevant plain text
Emacs and vi emulation matches or repetitive copy and paste.
Code templates are parameterized code snippets.
DVT IDE performs on-the-fly incremental compilation. Combined with TODO tags, this capability enables your
There is no need to invoke the simulator to make sure users to easily follow the project development guidelines.
the code compiles with no errors. Its smart editor
highlights the errors in real time, as you type. As a result, Errors inside macros are difficult to investigate. With DVT
users can make the necessary corrections on the spot. To IDE’s macro expansion feature, engineers can examine
assist with error correction, DVT IDE also provides fix and debug macro code fragments in context with the
proposals such as “did you mean” when detecting a source code.
potential typo and “update instance” when module ports
have changed. Moreover, the developer or reviewer can
quickly locate and fix various issues spread throughout
the code using the Problems View where all errors and
warnings are listed.
DVT IDE for Visual Studio Code in action (2)
Code and Project Navigation Features Semantic search for usage lets users quickly find out who
Maintaining tens of thousands of lines of code can be is calling “method foo,” who is using “signal clk of module
challenging. DVT IDE simplifies maintenance by providing fifo,” or “what are all the constraints on packet size.”
capabilities such as: Unlike plain text grep/sed searches, the semantic search
Hyperlinks results are accurate. For example, a search for “who is
Breadcrumb navigation bar calling method foo of class a” will not match calls to
Project database queries “method foo of some other class b.”
Semantic search for usage To help in understanding the project architecture, DVT
Structural views IDE offers structural views for examining function call,
Signal tracing design, and verification hierarchies.
UML and HDL diagrams
Comments and macro or parameter values in tooltips Using the signal tracing functionality, designers can
Semantic source code coloring effortlessly locate the signal source, an operation called
“show writers,” or the signal destination, an operation
These features enable users to navigate easily through called “show readers.” The signal trace can also be
complex code, locate the relevant information faster, and visualized as a diagram.
understand the source code quickly. They also reduce DVT IDE enables your engineers to inspect a project
project costs, by allowing users to avoid locking a through diagrams. Designers can use HDL diagrams such
simulator license just to inspect the design hierarchy or as schematic, state machine, and flow diagrams.
the verification environment architecture. Verification engineers can use UML diagrams such as
Hyperlinks help navigate faster through multiple project inheritance and collaboration diagrams. Diagrams are
files. This practically eliminates the need for using the hyperlinked and synchronized with the source code and
grep command or memorizing details such as file names can be saved for documentation purposes. Users can
and locations. To look up the definition of an element, easily search and filter diagrams as needed, for example,
users can simply hover the mouse over the element visualizing only the clock and reset signals in a schematic
name to turn it into a hyperlink. This saves time by diagram.
jumping directly to the element definition instead of Semantic source code coloring simplifies reading. For
having to search for it. example, inactive pre-processing regions are grayed-out,
The editor and diagrams show a breadcrumb navigation input ports are visibly distinct from output ports, and
bar that clearly indicates the current location in the local variables and class variables have different colors.
design hierarchy. It enables engineers to quickly find their In the design or verification source code, users can
way and easily move up and down in the design as include waveform and register specifications using the
needed. popular open-source WaveDrom format. They can
Project database queries allow users to quickly locate render and view waveforms, generate WaveDrom
specific elements. For example, typing a few letters in a templates, and view their registers graphically.
search bar locates a specific module, entity, class, macro,
assertion, or coverage item.
VERIFICATION METHODOLOGY INCREASING DESIGN AND
SUPPORT VERIFICATION PRODUCTIVITY
DVT IDE supports the Universal Verification Methodology AND QUALITY
(UVM). Its powerful UVM-oriented features help users Faster and Smarter Code Development
learn UVM faster, accelerate adoption, and build UVM DVT IDE was developed with maximizing the design
verification environments with ease. and verification productivity in mind. Users do not
need to switch from the editor to the simulator,
Users can easily browse through UVM-based classes browser, or console and therefore they can focus on
such as agents, monitors, and sequences, examine code writing and review. Moreover, DVT IDE
component trees, visualize architecture diagrams, and substantially reduces the time spent performing
generate code using UVM specific code templates and repetitive tasks such as locating a class or module
wizards. definition, finding all places where a function is called,
DVT IDE users can interactively run the Verissimo renaming a variable, and searching for relevant
SystemVerilog Linter product, including its checks information in large source code files or
for SystemVerilog and UVM compliance. Verissimo documentation.
SystemVerilog Linter provides hundreds of customizable
rules and advanced capabilities for a thorough audit of By using hyperlinks, autocomplete, in-line
testbenches. documentation, and semantic search features users
can find what they need through a single click or
shortcut. As a result, the speed and quality of code
CROSS-LANGUAGE CAPABILITIES FOR development increase significantly.
MIXED-LANGUAGE PROJECTS Efficient Project Management
The cross-language capabilities allow users to work with DVT IDE helps manage your design and verification
source code written in multiple languages and easily projects more efficiently. The ability to easily review
understand the whole design. the source code using features such as hyperlinks,
project database queries, structural views, and HDL or
Features such as hyperlinks, design hierarchy browsing, UML diagrams enables both managers and engineers
HDL diagrams, and signal tracing work across to see the whole picture clearly and control a project
SystemVerilog/Verilog and VHDL. For example, a user can from a higher perspective.
click on an instance in Verilog and jump to its VHDL Lower Language Learning Curve
definition.
Beginners feel comfortable with the DVT IDE friendly
user interface. In addition, the combination of
features such as compilation errors highlighted as you
type, error fix proposals, autocomplete, and code
templates together with the access to integrated
documentation speed up the learning process.
INTEGRATED SOLUTION
DVT IDE for VS Code is closely integrated with the other design and verification products available
from AMIQ EDA, including DVT Eclipse IDE, DVT Debugger, Verissimo SystemVerilog Linter,
and Specador Documentation Generator.
TECHNICAL SUPPORT CONTACT AMIQ
The technical support team is available to promptly answer your SUPPORT & EVALUATION Copyright 2022 AMIQ EDA S.R.L.
questions, provide you with training, and work with you to determine support@amiq.com All rights reserved.
your needs.
SALES The information contained herein is
Your requirements and feedback are important. Whether you are sales@amiq.com subject to change without notice.
looking for technical support or new features to improve your design
and verification flow, AMIQ’s technical support team strives to answer WEBSITES DVT-VSCODE-0122-A4
your requests in a timely manner. www.dvteclipse.com / www.amiq.com
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